CD24x0A Instruction Assignment Instruction Selection and Code mapping are critical in no pipeline CPU. Since the CD24x0A DSP has only 16 bit instruction data bit width, instruction design and its code mapping may be more critical than that of long-word instruction CPUs. The instruction set is common on any of CD2470A,80A,90A DSP. The program memory bit width is always 16 bit regardless of the data bit width difference on CD24x0A DSPs. The CD24x0A DSP gives an instruction set that are commonly used and acknowledged for general purpose signal processing, plus several audio compression related features.

6.25% of the code space is reserved for customer modification

The instruction code xxx1001xxxxxxxx is reserved for future customer instruction addition. Since this 6.25% code space is strictly avoided to use as redundancy in current instruction design, users can add new instruction in this space without knowing existing instruction details. (So are the S/W tools.) Since the CD24x0A DSPs execute NOP when these reserved codes are executed, users can simply use these codes for user specific hardware control.

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